BSPIO-RELE5-DS0 pages
Digital Modules for Boundary
Scan Parallel I/O Access
Via Rocca di Papa, 21 –00179 Roma, Italy
Email: info@geb-enterprise.com - Web: www.geb-enterprise.com
Model: BSPIO-RELE5
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
JTAG environment analog cluster test and measurement support
Relay Multiplexer Demultiplexer, 5x4 or 10X2 or 20X1 Channels.
9 I/O TTL, drives 3.3V logic, 5V tolerant
High reliability DIN41612 I/O connector
Reliable screw lock brackets
Size 122mmx70mm
I/O organized in 1 segment
96 bits Boundary-scan Register Length
Each segment can be independently bypassed
Medium-speed 10MHz TCK for high reliability at the best cost/performance ratio
Fully-compatible JTAG/IEEE 1149.1 Test Access Port (TAP)
Operating power 3.3V, 5.0V
Optional LVDS TCK interface can be used in large fixtures to avoid noise and skew problems.
General Description
10
10
10
01
10
10
10
The BSPIO-RELE5 provides parallel-scan controlled access to up to 20 electrical analog nodes for driving analog
signal inputs or sensing analog signal outputs. This module adds to the JTAG fixtures the capability of analog tests
1X2:1
and measurements integrated with the UUT
boundary-scan or traditional control logic. The
O(R,G,)
BSPIO-RELE5 is available in two basic versions, EI(R,G,B,M)
both compatible with the standard DIN41612
O
C0
female connectors in a test fixture. One version,
1X2:1
and
O(B,M)
the BSPIO-RELE5-A1, primarily intended for test
4X2:1
1X2:1
fixtures with few BSPIOs, and contains a
I1(R,G,B,M)
standard TTL interface on the TAP’s TCK signal. I2(R,G,B,M)
O (R,G,B,M)
This
module
facilitates
boundary-scan
4X2:1
4X2:1
interconnection testing using a direct connection I3(R,G,B,M)
O34(R,G,B,M)
to the JTAG/IEEE 1149.1 Test Access Port I4(R,G,B,M)
4X2:1
(TAP). The other version, the BSPIO-RELE5-A2,
C1
C4
C7
C8
C9
is intended for test fixtures with many BSPIOs
and contains a balanced LVDS interface on the
B-Scan cells
TAP’s TCK signal. This module facilitates
boundary-scan interconnection testing using a
Fig.1 Mux Demux Connection
small interface connection to the JTAG/IEEE
1149.1 TAP.