CK-SSCD Spread Spectrum Differential Clock Specification0 pages
CY25823
CK-SSCD Spread Spectrum Differential
Clock Specification
CK-SSCD Spread Spectrum Differential Clock Specification
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96- and 100-MHz frequency support
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Selectable slew rate control
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200-ps jitter
Lexmark Spread Spectrum for best electromagnetic
interference (EMI) reduction
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3.3 V operation
250-A power-down current
16-pin TSSOP package
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I2C programmability
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Features
For a complete list of related documentation, click here.
Logic Block Diagram
VDD
VDDA
REFOUT
Clock Input
Freq.
Divider
M
Phase
Detector
Charge
Pump
VCO
Post
Dividers
CLKOUT
(SSCG Output)
CLKOUT#
Modulating
Waveform
SDATA
SCLK
PWRDWN
Logic
Control
Feedback
Divider
N
PLL
VSS
Cypress Semiconductor Corporation
Document Number: 38-07579 Rev. *G
•
VSSA
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised February 24, 2015