AMB0480 Product Brief0 pages

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IDTAMB0480ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM COMMERCIAL TEMPERATURE RANGE

nnADVANCED MEMORY BUFFER
FOR FULLY BUFFERED DIMM
MODULES IDTAMB0480PRODUCTBRIEF FEATURES: DESCRIPTION: nn

? Advanced Memory Buffer for Fully buffered DIMMs The fully buffered dual in-line memory module (FB-DIMM) is the nextgeneration memory architecture to meet the growing memory requirement of
servers and workstations. The IDT Advanced Memory Buffer (AMB) chip is the
essential building block located on each FB-DIMM. The IDT AMB receives
commands and data from the host controller to control and write/read data to/
from the DRAMs on the DIMM. Commands and write data are sent southbound
from the host controller to AMBs in a daisy chain fashion and interpreted by the
target AMB. Status and read data are sent northbound from AMBs to the host
controller also in a daisy chain fashion, passing through non-target AMBs. This
unique channel structure alleviates buffer loading issues common in registered
DIMM technology, enabling designers to use a large number of DIMMs within
a single system.IDTAMB0480 complies with the latest JEDEC defined FB-DIMM Architectureand Protocol Specification and supports DDR2-533 and DDR2-667 DRAM.
It also enables serial data transfer at 3.2 and 4.0Gbps. The IDTAMB0480
supports servers, workstations, storage devices and communication applications
that support the next generation FB-DIMM architecture. ? 3.2 and 4 Gbit/s serial speeds (DDR2-533 and 667 DRAM) ? Support for up to eight DIMMs per channel ? Repeater Mode for extending FB-DIMM links ? Northbound and Southbound single lane fail over and channelerror detection ? Voltage and Timing margin high-speed I/O test capability ? Fully Supports the FB-DIMM configuration register set ? Test features supported include:
- Integrated thermal sensor and status indicator
- Supports MEMBIST, IBIST and Virtual Host mode
- Transparent mode and direct access mode for DRAM testing ? Complies with JEDEC Architecture and Protocol Specification ? Available in 655 ball FCBGA package

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?Wide range DDR Timing Control
?Superfine adjustment for DDR timing
?Wide range of DDR slew rate control
?Slew rate controllable independent of output impedance
?High speed SMBus in test mode
?IBIST IDT PRBS Generator

nnFDB MEMORY CHANNEL nn

Up to 8 modules

DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 >

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HostMemoryController

1410 IDTAMB IDTAMB IDTAMB IDTAMB DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 DDR2 >

nnThe IDT logo is a registered trademark of Integrated Device Technology, Inc. nn

COMMERCIAL TEMPERATURE RANGE APRIL 2006

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2006 Integrated Device Technology, Inc.DSC - 7042/2c

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