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DG406, DG407 ANALOG SWITCHES AND MULTIPLEXERS0 pages
DG406, DG407
Vishay Siliconix
16-Ch/Dual 8-Ch High-Performance CMOS Analog Multiplexers
DESCRIPTION
FEATURES
The DG406 is a 16 channel single-ended analog multiplexer
designed to connect one of sixteen inputs to a common
output as determined by a 4-bit binary address. The DG407
selects one of eight differential inputs to a common
differential output. Break-before-make switching action
protects against momentary shorting of inputs.
An on channel conducts current equally well in both
directions. In the off state each channel blocks voltages up
to the power supply rails. An enable (EN) function allows the
user to reset the multiplexer/demultiplexer to all switches off
for stacking several devices. All control inputs, address (Ax)
and enable (EN) are TTL compatible over the full specified
operating temperature range.
Applications for the DG406, DG407 include high speed data
acquisition, audio signal switching and routing, ATE
systems, and avionics. High performance and low power
dissipation make them ideal for battery operated and remote
instrumentation applications.
Designed in the 44 V silicon-gate CMOS process, the
absolute maximum voltage rating is extended to 44 V,
allowing operation with ± 20 V supplies. Additionally single
(12 V) supply operation is allowed. An epitaxial layer
prevents latchup.
For applications information please request documents
70601 and 70604.
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Low on-resistance - RDS(on): 50
Low charge injection - Q: 15 pC
Fast transition time - tTRANS: 200 ns
Low power: 0.2 mW
Single supply capability
• 44 V supply max. rating
Pb-free
Available
RoHS*
COMPLIANT
BENEFITS
•
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Higher accuracy
Reduced glitching
Improved data throughput
Reduced power consumption
Increased ruggedness
Wide supply ranges: ± 5 V to ± 20 V
APPLICATIONS
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Data acquisition systems
Audio signal routing
Medical instrumentation
ATE systems
Battery powered systems
High-rel systems
Single supply systems
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG406
DG407
Dual-In-Line and SOIC Wide-Body
V+
28
1
Dual-In-Line and SOIC Wide-Body
D
V+
1
28
Da
Db
2
27
V-
NC
2
27
V-
NC
3
26
S8
NC
3
26
S8a
S8b
4
25
S7a
S16
4
25
S7
S15
5
24
S6
S7b
5
24
S6a
S6b
6
23
S5a
S14
6
23
S5
S13
7
22
S4
S5b
7
22
S4a
S4b
8
21
S3a
20
S2a
S12
8
21
S3
S11
9
20
S2
S3b
9
S2b
10
19
S1a
18
EN
17
A0
2
S10
10
19
S1
S9
11
18
EN
S1b
11
17
A0
GND
12
16
A1
NC
13
16
A1
15
A2
NC
14
15
A2
GND
12
NC
13
A3
Decoders/Drivers
14
Top View
Decoders/Drivers
Top View
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 70061
S11-0179-Rev. J, 07-Feb-11
www.vishay.com
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