MC.40xx - 14 bit transient recorder0 pages

SPECTRUM SYSTEMENTWICKLUNG MICROELECTRONIC GMBH · AHRENSFELDER WEG 13-17 · 22927 GROSSHANSDORF · GERMANY 11.6.10
PHONE: +49 (0)4102-6956-0 · FAX: +49 (0)4102-6956-66 · E-MAIL: info@spec.de · INTERNET: http://www.spec.de
MC.40xx - 14 bit transient recorder
• CompactPCI 6U format
• Fastest 14 bit A/D converter board
• Models with 20 MS/s or 50 MS/s
• 1, 2 or 4 channels acquisition
• Simultaneously sampling on all channels
• 6 input ranges: ±200 mV up to ± 10 V
• Up to 256 MSample memory
• FIFO mode
• Window and pulsewidth trigger
• Input offset up to ±200%
• Software SBench for Windows included
• Software SBench for Linux included
Product range overview
Software/Drivers
A large number of drivers and examples are delivered
with the board or are available as an option:
• Windows 98/ME/NT/2000/XP/Vista/7 drivers
• Linux 32bit and 64bit drivers
• SBench 5.x for Windows
• SBench 6.x Base version for Windows and Linux
• Visual C++/Borland C++ Builder examples
• Borland Delphi examples
• Microsoft Visual Basic examples
• Microsoft Excel examples
• LabWindows/CVI examples
• FlexPro support with SBench
• LabVIEW - drivers (as option)
• DASYLab - drivers (as option)
• MATLAB - drivers (as option)
• Agilent VEE - drivers (as option)
General Information
The MC.40xx is best suitable for applications that
need high sampling rates as well as a maximum signal
dynamic. These boards offer a resolution 4 times
higher than 12 bit boards. On the MC.40xx every
channel has its own amplifier and A/D converter.
Each input channel can be adapted to a wide variety
of signal sources. This is done by software selecting a
matching input range, an input impedance and an individual
input offset. The user will find easily a
matching solution from the six offered models. These
versions are working with sampling rates of 20 MS/s
or 50 MS/s and have one, two or four channels and
can also be updated to a multi-channel system using
the internal synchronization bus.
Data is written in the internal 8 MSamples up to 256
MSample large memory. This memory can also be
Model 1 channel 2 channels 4 channels
MC.4020 20 MS/s
MC.4021 20 MS/s 20 MS/s
MC.4022 20 MS/s 20 MS/s 20 MS/s
MC.4030 50 MS/s
MC.4031 50 MS/s 50 MS/s
MC.4032 50 MS/s 50 MS/s 50 MS/s
used as a FIFO buffer. In FIFO mode data can be transferred on-line directly into
the PC RAM or to hard disk.
Hardware block diagram
Software programmable parameters
sampling rate 1 kS/s to max sampling rate, external clock, ref clock
Input Range ±200 mV, ±500 mV, ±1 V, ±2 V, ±5 V, ±10 V
Input impedance 50 Ohm / 1 MOhm
Input Offset ±200% in steps of 1%
Clock mode internal PLL, int.quartz, external, ext. divided, ext. reference clock
Clock impedance 50 Ohm / high impedance (> 4 kOhm)
Trigger impedance 50 Ohm / high impedance (> 4 kOhm)
Trigger mode Channel, External, Software, Auto, Windows, Pulse
Trigger level 1/1024 to 1023/1024 of input range (10 bit)
Trigger edge rising edge, falling edge or both edges
Trigger pulsewidth 1 to 255 samples in steps of 1 sample
Memory depth 32 up to installed memory in steps of 32
Posttrigger 32 up to 128 M in steps of 32
Multiple Recording segmentsize 32 up to installed memory / 2 in steps of 32